Update to ChibiOS 20.3.4, support builds against trunk (#14208)
* Add support for building against ChibiOS svn/trunk. * Swap to 21.6.x * Update to latest branch revision as released version is broken. * Updated configs. * Conf updates. * Updated ChibiOS * Convert STM32L422 to actual L422 ChibiOS platform. * Downgrade to 20.3.4 as ChibiOS 21.6.x is being aborted. * Rollback L422-based boards.
This commit is contained in:
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@ -14,10 +14,10 @@ ChibiOS and ChibiOS-Contrib need to be updated in tandem -- the latter has a bra
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* First time around this will take several hours
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* Subsequent updates will be incremental only
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* Tagging example (work out which version first!):
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* `git tag -a ver20.3.3 -m ver20.3.3 svn/tags/ver20.3.3`
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* `git push qmk ver20.3.3`
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* `git tag -a breaking_YYYY_qN -m breaking_YYYY_qN svn/tags/ver20.3.3`
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* `git push qmk breaking_YYYY_qN`
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* `git tag -a ver20.3.4 -m ver20.3.4 svn/tags/ver20.3.4`
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* `git push qmk ver20.3.4`
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* `git tag -a develop_YYYY_qN -m develop_YYYY_qN svn/tags/ver20.3.4`
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* `git push qmk develop_YYYY_qN`
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## Getting ChibiOS-Contrib
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@ -30,8 +30,8 @@ ChibiOS and ChibiOS-Contrib need to be updated in tandem -- the latter has a bra
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* `git checkout chibios-20.3.x`
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* `git pull --ff-only`
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* `git push origin chibios-20.3.x`
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* `git tag -a breaking_YYYY_qN -m breaking_YYYY_qN chibios-20.3.x`
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* `git push origin breaking_YYYY_qN`
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* `git tag -a develop_YYYY_qN -m develop_YYYY_qN chibios-20.3.x`
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* `git push origin develop_YYYY_qN`
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## Updating submodules
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@ -42,15 +42,18 @@ ChibiOS and ChibiOS-Contrib need to be updated in tandem -- the latter has a bra
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* `git checkout -b chibios-version-bump`
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* `cd lib/chibios`
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* `git fetch --all --tags --prune`
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* `git checkout breaking_YYYY_qN`
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* `git checkout develop_YYYY_qN`
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* `cd ../chibios-contrib`
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* `git fetch --all --tags --prune`
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* `git checkout breaking_YYYY_qN`
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* `git checkout develop_YYYY_qN`
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* Update ChibiOS configs within QMK
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* `cd $QMK_FIRMWARE`
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* `./util/chibios_conf_updater.sh`
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* Build everything
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* `cd $QMK_FIRMWARE`
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* `qmk multibuild -j4`
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* Make sure there are no errors
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* Push to the repo
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* `git commit -am 'Update ChibiOS to XXXXXXXXX'`
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* `git commit -am 'Update ChibiOS to 99.9.9'`
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* `git push --set-upstream origin chibios-version-bump`
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* Make a PR to qmk_firmware with the new branch
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* Make a PR to qmk_firmware with the new branch
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@ -1,5 +1,5 @@
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/*
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ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
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ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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@ -32,11 +32,15 @@
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*/
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#define STM32F4xx_MCUCONF
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#define STM32F411_MCUCONF
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/*
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* HAL driver system settings.
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*/
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#define STM32_NO_INIT FALSE
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_BKPRAM_ENABLE FALSE
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#define STM32_HSI_ENABLED TRUE
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#define STM32_LSI_ENABLED TRUE
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#define STM32_HSE_ENABLED TRUE
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@ -60,9 +64,6 @@
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_BKPRAM_ENABLE FALSE
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/*
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* IRQ system settings.
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@ -82,6 +83,19 @@
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#define STM32_IRQ_EXTI21_PRIORITY 15
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#define STM32_IRQ_EXTI22_PRIORITY 15
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#define STM32_IRQ_TIM1_BRK_TIM9_PRIORITY 7
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#define STM32_IRQ_TIM1_UP_TIM10_PRIORITY 7
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#define STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY 7
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#define STM32_IRQ_TIM1_CC_PRIORITY 7
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#define STM32_IRQ_TIM2_PRIORITY 7
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#define STM32_IRQ_TIM3_PRIORITY 7
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#define STM32_IRQ_TIM4_PRIORITY 7
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#define STM32_IRQ_TIM5_PRIORITY 7
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#define STM32_IRQ_USART1_PRIORITY 12
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#define STM32_IRQ_USART2_PRIORITY 12
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#define STM32_IRQ_USART6_PRIORITY 12
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/*
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* ADC driver system settings.
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*/
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@ -101,14 +115,8 @@
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#define STM32_GPT_USE_TIM4 TRUE
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#define STM32_GPT_USE_TIM5 FALSE
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#define STM32_GPT_USE_TIM9 FALSE
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#define STM32_GPT_USE_TIM10 FALSE
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#define STM32_GPT_USE_TIM11 FALSE
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#define STM32_GPT_TIM1_IRQ_PRIORITY 7
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#define STM32_GPT_TIM2_IRQ_PRIORITY 7
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#define STM32_GPT_TIM3_IRQ_PRIORITY 7
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#define STM32_GPT_TIM4_IRQ_PRIORITY 7
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#define STM32_GPT_TIM5_IRQ_PRIORITY 7
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#define STM32_GPT_TIM9_IRQ_PRIORITY 7
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#define STM32_GPT_TIM11_IRQ_PRIORITY 7
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/*
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* I2C driver system settings.
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@ -155,29 +163,28 @@
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#define STM32_ICU_USE_TIM4 FALSE
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#define STM32_ICU_USE_TIM5 FALSE
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#define STM32_ICU_USE_TIM9 FALSE
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#define STM32_ICU_TIM1_IRQ_PRIORITY 7
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#define STM32_ICU_TIM2_IRQ_PRIORITY 7
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#define STM32_ICU_TIM3_IRQ_PRIORITY 7
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#define STM32_ICU_TIM4_IRQ_PRIORITY 7
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#define STM32_ICU_TIM5_IRQ_PRIORITY 7
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#define STM32_ICU_TIM9_IRQ_PRIORITY 7
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#define STM32_ICU_USE_TIM10 FALSE
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#define STM32_ICU_USE_TIM11 FALSE
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/*
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* PWM driver system settings.
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*/
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#define STM32_PWM_USE_ADVANCED FALSE
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#define STM32_PWM_USE_TIM1 FALSE
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#define STM32_PWM_USE_TIM2 FALSE
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#define STM32_PWM_USE_TIM3 FALSE
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#define STM32_PWM_USE_TIM4 FALSE
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#define STM32_PWM_USE_TIM5 FALSE
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#define STM32_PWM_USE_TIM9 FALSE
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#define STM32_PWM_TIM1_IRQ_PRIORITY 7
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#define STM32_PWM_TIM2_IRQ_PRIORITY 7
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#define STM32_PWM_TIM3_IRQ_PRIORITY 7
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#define STM32_PWM_TIM4_IRQ_PRIORITY 7
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#define STM32_PWM_TIM5_IRQ_PRIORITY 7
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#define STM32_PWM_TIM9_IRQ_PRIORITY 7
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#define STM32_PWM_USE_TIM10 FALSE
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#define STM32_PWM_USE_TIM11 FALSE
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/*
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* RTC driver system settings.
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*/
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#define STM32_RTC_PRESA_VALUE 32
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#define STM32_RTC_PRESS_VALUE 1024
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#define STM32_RTC_CR_INIT 0
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#define STM32_RTC_TAMPCR_INIT 0
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/*
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* SERIAL driver system settings.
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#define STM32_SERIAL_USE_USART1 FALSE
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#define STM32_SERIAL_USE_USART2 FALSE
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#define STM32_SERIAL_USE_USART6 FALSE
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#define STM32_SERIAL_USART1_PRIORITY 12
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#define STM32_SERIAL_USART2_PRIORITY 12
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#define STM32_SERIAL_USART6_PRIORITY 12
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/*
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* SPI driver system settings.
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#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
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#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
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#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
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#define STM32_UART_USART1_IRQ_PRIORITY 12
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#define STM32_UART_USART2_IRQ_PRIORITY 12
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#define STM32_UART_USART6_IRQ_PRIORITY 12
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#define STM32_UART_USART1_DMA_PRIORITY 0
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#define STM32_UART_USART2_DMA_PRIORITY 0
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#define STM32_UART_USART6_DMA_PRIORITY 0
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#define STM32_USB_USE_OTG1 TRUE
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#define STM32_USB_OTG1_IRQ_PRIORITY 14
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#define STM32_USB_OTG1_RX_FIFO_SIZE 512
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#define STM32_USB_OTG_THREAD_PRIO LOWPRIO
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#define STM32_USB_OTG_THREAD_STACK_SIZE 128
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#define STM32_USB_OTGFIFO_FILL_BASEPRI 0
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#define STM32_USB_HOST_WAKEUP_DURATION 2
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/*
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* WDG driver system settings.
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@ -1,5 +1,5 @@
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/*
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ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
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ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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@ -32,11 +32,15 @@
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*/
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#define STM32F4xx_MCUCONF
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#define STM32F411_MCUCONF
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/*
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* HAL driver system settings.
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*/
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#define STM32_NO_INIT FALSE
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_BKPRAM_ENABLE FALSE
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#define STM32_HSI_ENABLED TRUE
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#define STM32_LSI_ENABLED TRUE
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#define STM32_HSE_ENABLED TRUE
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_BKPRAM_ENABLE FALSE
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/*
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* IRQ system settings.
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#define STM32_IRQ_EXTI21_PRIORITY 15
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#define STM32_IRQ_EXTI22_PRIORITY 15
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#define STM32_IRQ_TIM1_BRK_TIM9_PRIORITY 7
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#define STM32_IRQ_TIM1_UP_TIM10_PRIORITY 7
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#define STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY 7
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#define STM32_IRQ_TIM1_CC_PRIORITY 7
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#define STM32_IRQ_TIM2_PRIORITY 7
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#define STM32_IRQ_TIM3_PRIORITY 7
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#define STM32_IRQ_TIM4_PRIORITY 7
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#define STM32_IRQ_TIM5_PRIORITY 7
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#define STM32_IRQ_USART1_PRIORITY 12
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#define STM32_IRQ_USART2_PRIORITY 12
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#define STM32_IRQ_USART6_PRIORITY 12
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/*
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* ADC driver system settings.
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*/
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#define STM32_GPT_USE_TIM4 TRUE
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#define STM32_GPT_USE_TIM5 FALSE
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#define STM32_GPT_USE_TIM9 FALSE
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#define STM32_GPT_USE_TIM10 FALSE
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#define STM32_GPT_USE_TIM11 FALSE
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#define STM32_GPT_TIM1_IRQ_PRIORITY 7
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#define STM32_GPT_TIM2_IRQ_PRIORITY 7
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#define STM32_GPT_TIM3_IRQ_PRIORITY 7
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#define STM32_GPT_TIM4_IRQ_PRIORITY 7
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#define STM32_GPT_TIM5_IRQ_PRIORITY 7
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#define STM32_GPT_TIM9_IRQ_PRIORITY 7
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#define STM32_GPT_TIM11_IRQ_PRIORITY 7
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/*
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* I2C driver system settings.
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#define STM32_ICU_USE_TIM4 FALSE
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#define STM32_ICU_USE_TIM5 FALSE
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#define STM32_ICU_USE_TIM9 FALSE
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#define STM32_ICU_TIM1_IRQ_PRIORITY 7
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#define STM32_ICU_TIM2_IRQ_PRIORITY 7
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#define STM32_ICU_TIM3_IRQ_PRIORITY 7
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#define STM32_ICU_TIM4_IRQ_PRIORITY 7
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#define STM32_ICU_TIM5_IRQ_PRIORITY 7
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#define STM32_ICU_TIM9_IRQ_PRIORITY 7
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#define STM32_ICU_USE_TIM10 FALSE
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#define STM32_ICU_USE_TIM11 FALSE
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/*
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* PWM driver system settings.
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*/
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#define STM32_PWM_USE_ADVANCED FALSE
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#define STM32_PWM_USE_TIM1 FALSE
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#define STM32_PWM_USE_TIM2 FALSE
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#define STM32_PWM_USE_TIM3 FALSE
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#define STM32_PWM_USE_TIM4 FALSE
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#define STM32_PWM_USE_TIM5 FALSE
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#define STM32_PWM_USE_TIM9 FALSE
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#define STM32_PWM_TIM1_IRQ_PRIORITY 7
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#define STM32_PWM_TIM2_IRQ_PRIORITY 7
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#define STM32_PWM_TIM3_IRQ_PRIORITY 7
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#define STM32_PWM_TIM4_IRQ_PRIORITY 7
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#define STM32_PWM_TIM5_IRQ_PRIORITY 7
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#define STM32_PWM_TIM9_IRQ_PRIORITY 7
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#define STM32_PWM_USE_TIM10 FALSE
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#define STM32_PWM_USE_TIM11 FALSE
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/*
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* RTC driver system settings.
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*/
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#define STM32_RTC_PRESA_VALUE 32
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#define STM32_RTC_PRESS_VALUE 1024
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#define STM32_RTC_CR_INIT 0
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#define STM32_RTC_TAMPCR_INIT 0
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/*
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* SERIAL driver system settings.
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#define STM32_SERIAL_USE_USART1 FALSE
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#define STM32_SERIAL_USE_USART2 FALSE
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#define STM32_SERIAL_USE_USART6 FALSE
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#define STM32_SERIAL_USART1_PRIORITY 12
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#define STM32_SERIAL_USART2_PRIORITY 12
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#define STM32_SERIAL_USART6_PRIORITY 12
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/*
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* SPI driver system settings.
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#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
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#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
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#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
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#define STM32_UART_USART1_IRQ_PRIORITY 12
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#define STM32_UART_USART2_IRQ_PRIORITY 12
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#define STM32_UART_USART6_IRQ_PRIORITY 12
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#define STM32_UART_USART1_DMA_PRIORITY 0
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#define STM32_UART_USART2_DMA_PRIORITY 0
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#define STM32_UART_USART6_DMA_PRIORITY 0
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#define STM32_USB_USE_OTG1 TRUE
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#define STM32_USB_OTG1_IRQ_PRIORITY 14
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#define STM32_USB_OTG1_RX_FIFO_SIZE 512
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#define STM32_USB_OTG_THREAD_PRIO LOWPRIO
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#define STM32_USB_OTG_THREAD_STACK_SIZE 128
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#define STM32_USB_OTGFIFO_FILL_BASEPRI 0
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#define STM32_USB_HOST_WAKEUP_DURATION 2
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/*
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* WDG driver system settings.
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@ -1 +1 @@
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Subproject commit 413e39c5681d181720440f2a8b7391f581788d7b
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Subproject commit d7b9d1c87f724bd7c8cd1486d6d0dc3ba52e0d52
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@ -1,5 +1,5 @@
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/*
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ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
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ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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||||
you may not use this file except in compliance with the License.
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@ -32,11 +32,15 @@
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*/
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#define STM32F4xx_MCUCONF
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#define STM32F401_MCUCONF
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/*
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* HAL driver system settings.
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*/
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#define STM32_NO_INIT FALSE
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_BKPRAM_ENABLE FALSE
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#define STM32_HSI_ENABLED TRUE
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#define STM32_LSI_ENABLED TRUE
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#define STM32_HSE_ENABLED TRUE
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#define STM32_CLOCK48_REQUIRED TRUE
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#define STM32_SW STM32_SW_PLL
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#define STM32_PLLSRC STM32_PLLSRC_HSE
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#define STM32_PLLM_VALUE 25
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#define STM32_PLLN_VALUE 336
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#define STM32_PLLP_VALUE 4
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#define STM32_PLLQ_VALUE 7
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#define STM32_HPRE STM32_HPRE_DIV1
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#define STM32_PPRE1 STM32_PPRE1_DIV4
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#define STM32_PPRE2 STM32_PPRE2_DIV2
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#define STM32_PLLM_VALUE 25
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#define STM32_PLLN_VALUE 336
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#define STM32_PLLP_VALUE 4
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#define STM32_PLLQ_VALUE 7
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#define STM32_HPRE STM32_HPRE_DIV1
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#define STM32_PPRE1 STM32_PPRE1_DIV4
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#define STM32_PPRE2 STM32_PPRE2_DIV2
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#define STM32_RTCSEL STM32_RTCSEL_LSI
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#define STM32_RTCPRE_VALUE 8
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#define STM32_MCO1SEL STM32_MCO1SEL_HSI
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_PVD_ENABLE FALSE
|
||||
#define STM32_PLS STM32_PLS_LEV0
|
||||
#define STM32_BKPRAM_ENABLE FALSE
|
||||
|
||||
/*
|
||||
* IRQ system settings.
|
||||
|
@ -82,6 +83,19 @@
|
|||
#define STM32_IRQ_EXTI21_PRIORITY 15
|
||||
#define STM32_IRQ_EXTI22_PRIORITY 15
|
||||
|
||||
#define STM32_IRQ_TIM1_BRK_TIM9_PRIORITY 7
|
||||
#define STM32_IRQ_TIM1_UP_TIM10_PRIORITY 7
|
||||
#define STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY 7
|
||||
#define STM32_IRQ_TIM1_CC_PRIORITY 7
|
||||
#define STM32_IRQ_TIM2_PRIORITY 7
|
||||
#define STM32_IRQ_TIM3_PRIORITY 7
|
||||
#define STM32_IRQ_TIM4_PRIORITY 7
|
||||
#define STM32_IRQ_TIM5_PRIORITY 7
|
||||
|
||||
#define STM32_IRQ_USART1_PRIORITY 12
|
||||
#define STM32_IRQ_USART2_PRIORITY 12
|
||||
#define STM32_IRQ_USART6_PRIORITY 12
|
||||
|
||||
/*
|
||||
* ADC driver system settings.
|
||||
*/
|
||||
|
@ -101,14 +115,8 @@
|
|||
#define STM32_GPT_USE_TIM4 FALSE
|
||||
#define STM32_GPT_USE_TIM5 FALSE
|
||||
#define STM32_GPT_USE_TIM9 FALSE
|
||||
#define STM32_GPT_USE_TIM10 FALSE
|
||||
#define STM32_GPT_USE_TIM11 FALSE
|
||||
#define STM32_GPT_TIM1_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM2_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM3_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM4_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM5_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM9_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM11_IRQ_PRIORITY 7
|
||||
|
||||
/*
|
||||
* I2C driver system settings.
|
||||
|
@ -155,29 +163,20 @@
|
|||
#define STM32_ICU_USE_TIM4 FALSE
|
||||
#define STM32_ICU_USE_TIM5 FALSE
|
||||
#define STM32_ICU_USE_TIM9 FALSE
|
||||
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM9_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_USE_TIM10 FALSE
|
||||
#define STM32_ICU_USE_TIM11 FALSE
|
||||
|
||||
/*
|
||||
* PWM driver system settings.
|
||||
*/
|
||||
#define STM32_PWM_USE_ADVANCED FALSE
|
||||
#define STM32_PWM_USE_TIM1 FALSE
|
||||
#define STM32_PWM_USE_TIM2 FALSE
|
||||
#define STM32_PWM_USE_TIM3 FALSE
|
||||
#define STM32_PWM_USE_TIM4 FALSE
|
||||
#define STM32_PWM_USE_TIM5 FALSE
|
||||
#define STM32_PWM_USE_TIM9 FALSE
|
||||
#define STM32_PWM_TIM1_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM2_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM3_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM5_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM9_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_USE_TIM10 FALSE
|
||||
#define STM32_PWM_USE_TIM11 FALSE
|
||||
|
||||
/*
|
||||
* SERIAL driver system settings.
|
||||
|
@ -185,9 +184,6 @@
|
|||
#define STM32_SERIAL_USE_USART1 FALSE
|
||||
#define STM32_SERIAL_USE_USART2 FALSE
|
||||
#define STM32_SERIAL_USE_USART6 FALSE
|
||||
#define STM32_SERIAL_USART1_PRIORITY 12
|
||||
#define STM32_SERIAL_USART2_PRIORITY 12
|
||||
#define STM32_SERIAL_USART6_PRIORITY 12
|
||||
|
||||
/*
|
||||
* SPI driver system settings.
|
||||
|
@ -227,9 +223,6 @@
|
|||
#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
|
||||
#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
|
||||
#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
|
||||
#define STM32_UART_USART1_IRQ_PRIORITY 12
|
||||
#define STM32_UART_USART2_IRQ_PRIORITY 12
|
||||
#define STM32_UART_USART6_IRQ_PRIORITY 12
|
||||
#define STM32_UART_USART1_DMA_PRIORITY 0
|
||||
#define STM32_UART_USART2_DMA_PRIORITY 0
|
||||
#define STM32_UART_USART6_DMA_PRIORITY 0
|
||||
|
@ -241,9 +234,7 @@
|
|||
#define STM32_USB_USE_OTG1 TRUE
|
||||
#define STM32_USB_OTG1_IRQ_PRIORITY 14
|
||||
#define STM32_USB_OTG1_RX_FIFO_SIZE 512
|
||||
#define STM32_USB_OTG_THREAD_PRIO NORMALPRIO+1
|
||||
#define STM32_USB_OTG_THREAD_STACK_SIZE 128
|
||||
#define STM32_USB_OTGFIFO_FILL_BASEPRI 0
|
||||
#define STM32_USB_HOST_WAKEUP_DURATION 2
|
||||
|
||||
/*
|
||||
* WDG driver system settings.
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
|
@ -32,11 +32,15 @@
|
|||
*/
|
||||
|
||||
#define STM32F4xx_MCUCONF
|
||||
#define STM32F411_MCUCONF
|
||||
|
||||
/*
|
||||
* HAL driver system settings.
|
||||
*/
|
||||
#define STM32_NO_INIT FALSE
|
||||
#define STM32_PVD_ENABLE FALSE
|
||||
#define STM32_PLS STM32_PLS_LEV0
|
||||
#define STM32_BKPRAM_ENABLE FALSE
|
||||
#define STM32_HSI_ENABLED TRUE
|
||||
#define STM32_LSI_ENABLED TRUE
|
||||
#define STM32_HSE_ENABLED TRUE
|
||||
|
@ -60,9 +64,6 @@
|
|||
#define STM32_I2SSRC STM32_I2SSRC_CKIN
|
||||
#define STM32_PLLI2SN_VALUE 192
|
||||
#define STM32_PLLI2SR_VALUE 5
|
||||
#define STM32_PVD_ENABLE FALSE
|
||||
#define STM32_PLS STM32_PLS_LEV0
|
||||
#define STM32_BKPRAM_ENABLE FALSE
|
||||
|
||||
/*
|
||||
* IRQ system settings.
|
||||
|
@ -82,6 +83,19 @@
|
|||
#define STM32_IRQ_EXTI21_PRIORITY 15
|
||||
#define STM32_IRQ_EXTI22_PRIORITY 15
|
||||
|
||||
#define STM32_IRQ_TIM1_BRK_TIM9_PRIORITY 7
|
||||
#define STM32_IRQ_TIM1_UP_TIM10_PRIORITY 7
|
||||
#define STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY 7
|
||||
#define STM32_IRQ_TIM1_CC_PRIORITY 7
|
||||
#define STM32_IRQ_TIM2_PRIORITY 7
|
||||
#define STM32_IRQ_TIM3_PRIORITY 7
|
||||
#define STM32_IRQ_TIM4_PRIORITY 7
|
||||
#define STM32_IRQ_TIM5_PRIORITY 7
|
||||
|
||||
#define STM32_IRQ_USART1_PRIORITY 12
|
||||
#define STM32_IRQ_USART2_PRIORITY 12
|
||||
#define STM32_IRQ_USART6_PRIORITY 12
|
||||
|
||||
/*
|
||||
* ADC driver system settings.
|
||||
*/
|
||||
|
@ -101,14 +115,8 @@
|
|||
#define STM32_GPT_USE_TIM4 FALSE
|
||||
#define STM32_GPT_USE_TIM5 FALSE
|
||||
#define STM32_GPT_USE_TIM9 FALSE
|
||||
#define STM32_GPT_USE_TIM10 FALSE
|
||||
#define STM32_GPT_USE_TIM11 FALSE
|
||||
#define STM32_GPT_TIM1_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM2_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM3_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM4_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM5_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM9_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM11_IRQ_PRIORITY 7
|
||||
|
||||
/*
|
||||
* I2C driver system settings.
|
||||
|
@ -155,29 +163,28 @@
|
|||
#define STM32_ICU_USE_TIM4 FALSE
|
||||
#define STM32_ICU_USE_TIM5 FALSE
|
||||
#define STM32_ICU_USE_TIM9 FALSE
|
||||
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM9_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_USE_TIM10 FALSE
|
||||
#define STM32_ICU_USE_TIM11 FALSE
|
||||
|
||||
/*
|
||||
* PWM driver system settings.
|
||||
*/
|
||||
#define STM32_PWM_USE_ADVANCED FALSE
|
||||
#define STM32_PWM_USE_TIM1 FALSE
|
||||
#define STM32_PWM_USE_TIM2 FALSE
|
||||
#define STM32_PWM_USE_TIM3 FALSE
|
||||
#define STM32_PWM_USE_TIM4 FALSE
|
||||
#define STM32_PWM_USE_TIM5 FALSE
|
||||
#define STM32_PWM_USE_TIM9 FALSE
|
||||
#define STM32_PWM_TIM1_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM2_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM3_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM5_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM9_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_USE_TIM10 FALSE
|
||||
#define STM32_PWM_USE_TIM11 FALSE
|
||||
|
||||
/*
|
||||
* RTC driver system settings.
|
||||
*/
|
||||
#define STM32_RTC_PRESA_VALUE 32
|
||||
#define STM32_RTC_PRESS_VALUE 1024
|
||||
#define STM32_RTC_CR_INIT 0
|
||||
#define STM32_RTC_TAMPCR_INIT 0
|
||||
|
||||
/*
|
||||
* SERIAL driver system settings.
|
||||
|
@ -185,9 +192,6 @@
|
|||
#define STM32_SERIAL_USE_USART1 FALSE
|
||||
#define STM32_SERIAL_USE_USART2 FALSE
|
||||
#define STM32_SERIAL_USE_USART6 FALSE
|
||||
#define STM32_SERIAL_USART1_PRIORITY 12
|
||||
#define STM32_SERIAL_USART2_PRIORITY 12
|
||||
#define STM32_SERIAL_USART6_PRIORITY 12
|
||||
|
||||
/*
|
||||
* SPI driver system settings.
|
||||
|
@ -227,9 +231,6 @@
|
|||
#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
|
||||
#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
|
||||
#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
|
||||
#define STM32_UART_USART1_IRQ_PRIORITY 12
|
||||
#define STM32_UART_USART2_IRQ_PRIORITY 12
|
||||
#define STM32_UART_USART6_IRQ_PRIORITY 12
|
||||
#define STM32_UART_USART1_DMA_PRIORITY 0
|
||||
#define STM32_UART_USART2_DMA_PRIORITY 0
|
||||
#define STM32_UART_USART6_DMA_PRIORITY 0
|
||||
|
@ -241,9 +242,7 @@
|
|||
#define STM32_USB_USE_OTG1 TRUE
|
||||
#define STM32_USB_OTG1_IRQ_PRIORITY 14
|
||||
#define STM32_USB_OTG1_RX_FIFO_SIZE 512
|
||||
#define STM32_USB_OTG_THREAD_PRIO NORMALPRIO+1
|
||||
#define STM32_USB_OTG_THREAD_STACK_SIZE 128
|
||||
#define STM32_USB_OTGFIFO_FILL_BASEPRI 0
|
||||
#define STM32_USB_HOST_WAKEUP_DURATION 2
|
||||
|
||||
/*
|
||||
* WDG driver system settings.
|
||||
|
|
|
@ -344,9 +344,6 @@
|
|||
#define STM32_USB_OTG2_RX_FIFO_SIZE 1024
|
||||
#define STM32_USB_HOST_WAKEUP_DURATION 2
|
||||
|
||||
#define STM32_USB_OTG_THREAD_PRIO NORMALPRIO+1
|
||||
#define STM32_USB_OTG_THREAD_STACK_SIZE 128
|
||||
|
||||
/*
|
||||
* WDG driver system settings.
|
||||
*/
|
||||
|
|
|
@ -344,9 +344,6 @@
|
|||
#define STM32_USB_OTG2_RX_FIFO_SIZE 1024
|
||||
#define STM32_USB_HOST_WAKEUP_DURATION 2
|
||||
|
||||
#define STM32_USB_OTG_THREAD_PRIO NORMALPRIO+1
|
||||
#define STM32_USB_OTG_THREAD_STACK_SIZE 128
|
||||
|
||||
/*
|
||||
* WDG driver system settings.
|
||||
*/
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
|
@ -32,11 +32,15 @@
|
|||
*/
|
||||
|
||||
#define STM32F4xx_MCUCONF
|
||||
#define STM32F446_MCUCONF
|
||||
|
||||
/*
|
||||
* HAL driver system settings.
|
||||
*/
|
||||
#define STM32_NO_INIT FALSE
|
||||
#define STM32_PVD_ENABLE FALSE
|
||||
#define STM32_PLS STM32_PLS_LEV0
|
||||
#define STM32_BKPRAM_ENABLE FALSE
|
||||
#define STM32_HSI_ENABLED FALSE
|
||||
#define STM32_LSI_ENABLED TRUE
|
||||
#define STM32_HSE_ENABLED TRUE
|
||||
|
@ -70,9 +74,6 @@
|
|||
#define STM32_SAI1SEL STM32_SAI2SEL_PLLR
|
||||
#define STM32_SAI2SEL STM32_SAI2SEL_PLLR
|
||||
#define STM32_CK48MSEL STM32_CK48MSEL_PLLALT
|
||||
#define STM32_PVD_ENABLE FALSE
|
||||
#define STM32_PLS STM32_PLS_LEV0
|
||||
#define STM32_BKPRAM_ENABLE FALSE
|
||||
|
||||
/*
|
||||
* IRQ system settings.
|
||||
|
@ -92,6 +93,30 @@
|
|||
#define STM32_IRQ_EXTI21_PRIORITY 15
|
||||
#define STM32_IRQ_EXTI22_PRIORITY 15
|
||||
|
||||
#define STM32_IRQ_TIM1_BRK_TIM9_PRIORITY 7
|
||||
#define STM32_IRQ_TIM1_UP_TIM10_PRIORITY 7
|
||||
#define STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY 7
|
||||
#define STM32_IRQ_TIM1_CC_PRIORITY 7
|
||||
#define STM32_IRQ_TIM2_PRIORITY 7
|
||||
#define STM32_IRQ_TIM3_PRIORITY 7
|
||||
#define STM32_IRQ_TIM4_PRIORITY 7
|
||||
#define STM32_IRQ_TIM5_PRIORITY 7
|
||||
#define STM32_IRQ_TIM6_PRIORITY 7
|
||||
#define STM32_IRQ_TIM7_PRIORITY 7
|
||||
#define STM32_IRQ_TIM8_BRK_TIM12_PRIORITY 7
|
||||
#define STM32_IRQ_TIM8_UP_TIM13_PRIORITY 7
|
||||
#define STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY 7
|
||||
#define STM32_IRQ_TIM8_CC_PRIORITY 7
|
||||
|
||||
#define STM32_IRQ_USART1_PRIORITY 12
|
||||
#define STM32_IRQ_USART2_PRIORITY 12
|
||||
#define STM32_IRQ_USART3_PRIORITY 12
|
||||
#define STM32_IRQ_UART4_PRIORITY 12
|
||||
#define STM32_IRQ_UART5_PRIORITY 12
|
||||
#define STM32_IRQ_USART6_PRIORITY 12
|
||||
#define STM32_IRQ_UART7_PRIORITY 12
|
||||
#define STM32_IRQ_UART8_PRIORITY 12
|
||||
|
||||
/*
|
||||
* ADC driver system settings.
|
||||
*/
|
||||
|
@ -143,21 +168,11 @@
|
|||
#define STM32_GPT_USE_TIM7 FALSE
|
||||
#define STM32_GPT_USE_TIM8 FALSE
|
||||
#define STM32_GPT_USE_TIM9 FALSE
|
||||
#define STM32_GPT_USE_TIM10 FALSE
|
||||
#define STM32_GPT_USE_TIM11 FALSE
|
||||
#define STM32_GPT_USE_TIM12 FALSE
|
||||
#define STM32_GPT_USE_TIM13 FALSE
|
||||
#define STM32_GPT_USE_TIM14 FALSE
|
||||
#define STM32_GPT_TIM1_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM2_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM3_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM4_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM5_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM6_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM7_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM8_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM9_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM11_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM12_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM14_IRQ_PRIORITY 7
|
||||
|
||||
/*
|
||||
* I2C driver system settings.
|
||||
|
@ -205,13 +220,11 @@
|
|||
#define STM32_ICU_USE_TIM5 FALSE
|
||||
#define STM32_ICU_USE_TIM8 FALSE
|
||||
#define STM32_ICU_USE_TIM9 FALSE
|
||||
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM9_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_USE_TIM10 FALSE
|
||||
#define STM32_ICU_USE_TIM11 FALSE
|
||||
#define STM32_ICU_USE_TIM12 FALSE
|
||||
#define STM32_ICU_USE_TIM13 FALSE
|
||||
#define STM32_ICU_USE_TIM14 FALSE
|
||||
|
||||
/*
|
||||
* MAC driver system settings.
|
||||
|
@ -227,7 +240,6 @@
|
|||
/*
|
||||
* PWM driver system settings.
|
||||
*/
|
||||
#define STM32_PWM_USE_ADVANCED FALSE
|
||||
#define STM32_PWM_USE_TIM1 FALSE
|
||||
#define STM32_PWM_USE_TIM2 FALSE
|
||||
#define STM32_PWM_USE_TIM3 FALSE
|
||||
|
@ -235,13 +247,19 @@
|
|||
#define STM32_PWM_USE_TIM5 FALSE
|
||||
#define STM32_PWM_USE_TIM8 FALSE
|
||||
#define STM32_PWM_USE_TIM9 FALSE
|
||||
#define STM32_PWM_TIM1_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM2_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM3_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM5_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM8_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM9_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_USE_TIM10 FALSE
|
||||
#define STM32_PWM_USE_TIM11 FALSE
|
||||
#define STM32_PWM_USE_TIM12 FALSE
|
||||
#define STM32_PWM_USE_TIM13 FALSE
|
||||
#define STM32_PWM_USE_TIM14 FALSE
|
||||
|
||||
/*
|
||||
* RTC driver system settings.
|
||||
*/
|
||||
#define STM32_RTC_PRESA_VALUE 32
|
||||
#define STM32_RTC_PRESS_VALUE 1024
|
||||
#define STM32_RTC_CR_INIT 0
|
||||
#define STM32_RTC_TAMPCR_INIT 0
|
||||
|
||||
/*
|
||||
* SDC driver system settings.
|
||||
|
@ -265,14 +283,6 @@
|
|||
#define STM32_SERIAL_USE_USART6 FALSE
|
||||
#define STM32_SERIAL_USE_UART7 FALSE
|
||||
#define STM32_SERIAL_USE_UART8 FALSE
|
||||
#define STM32_SERIAL_USART1_PRIORITY 12
|
||||
#define STM32_SERIAL_USART2_PRIORITY 12
|
||||
#define STM32_SERIAL_USART3_PRIORITY 12
|
||||
#define STM32_SERIAL_UART4_PRIORITY 12
|
||||
#define STM32_SERIAL_UART5_PRIORITY 12
|
||||
#define STM32_SERIAL_USART6_PRIORITY 12
|
||||
#define STM32_SERIAL_UART7_PRIORITY 12
|
||||
#define STM32_SERIAL_UART8_PRIORITY 12
|
||||
|
||||
/*
|
||||
* SPI driver system settings.
|
||||
|
@ -281,6 +291,8 @@
|
|||
#define STM32_SPI_USE_SPI2 FALSE
|
||||
#define STM32_SPI_USE_SPI3 FALSE
|
||||
#define STM32_SPI_USE_SPI4 FALSE
|
||||
#define STM32_SPI_USE_SPI5 FALSE
|
||||
#define STM32_SPI_USE_SPI6 FALSE
|
||||
#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0)
|
||||
#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
|
||||
#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
|
||||
|
@ -289,14 +301,22 @@
|
|||
#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
|
||||
#define STM32_SPI_SPI4_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0)
|
||||
#define STM32_SPI_SPI4_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
|
||||
#define STM32_SPI_SPI5_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
|
||||
#define STM32_SPI_SPI5_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
|
||||
#define STM32_SPI_SPI6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
|
||||
#define STM32_SPI_SPI6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
|
||||
#define STM32_SPI_SPI1_DMA_PRIORITY 1
|
||||
#define STM32_SPI_SPI2_DMA_PRIORITY 1
|
||||
#define STM32_SPI_SPI3_DMA_PRIORITY 1
|
||||
#define STM32_SPI_SPI4_DMA_PRIORITY 1
|
||||
#define STM32_SPI_SPI5_DMA_PRIORITY 1
|
||||
#define STM32_SPI_SPI6_DMA_PRIORITY 1
|
||||
#define STM32_SPI_SPI1_IRQ_PRIORITY 10
|
||||
#define STM32_SPI_SPI2_IRQ_PRIORITY 10
|
||||
#define STM32_SPI_SPI3_IRQ_PRIORITY 10
|
||||
#define STM32_SPI_SPI4_IRQ_PRIORITY 10
|
||||
#define STM32_SPI_SPI5_IRQ_PRIORITY 10
|
||||
#define STM32_SPI_SPI6_IRQ_PRIORITY 10
|
||||
#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
|
||||
|
||||
/*
|
||||
|
@ -326,12 +346,6 @@
|
|||
#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
|
||||
#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
|
||||
#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
|
||||
#define STM32_UART_USART1_IRQ_PRIORITY 12
|
||||
#define STM32_UART_USART2_IRQ_PRIORITY 12
|
||||
#define STM32_UART_USART3_IRQ_PRIORITY 12
|
||||
#define STM32_UART_UART4_IRQ_PRIORITY 12
|
||||
#define STM32_UART_UART5_IRQ_PRIORITY 12
|
||||
#define STM32_UART_USART6_IRQ_PRIORITY 12
|
||||
#define STM32_UART_USART1_DMA_PRIORITY 0
|
||||
#define STM32_UART_USART2_DMA_PRIORITY 0
|
||||
#define STM32_UART_USART3_DMA_PRIORITY 0
|
||||
|
@ -349,9 +363,7 @@
|
|||
#define STM32_USB_OTG2_IRQ_PRIORITY 14
|
||||
#define STM32_USB_OTG1_RX_FIFO_SIZE 512
|
||||
#define STM32_USB_OTG2_RX_FIFO_SIZE 1024
|
||||
#define STM32_USB_OTG_THREAD_PRIO LOWPRIO
|
||||
#define STM32_USB_OTG_THREAD_STACK_SIZE 128
|
||||
#define STM32_USB_OTGFIFO_FILL_BASEPRI 0
|
||||
#define STM32_USB_HOST_WAKEUP_DURATION 2
|
||||
|
||||
/*
|
||||
* WDG driver system settings.
|
||||
|
|
|
@ -40,9 +40,24 @@
|
|||
*/
|
||||
#define STM32_NO_INIT FALSE
|
||||
#define STM32_VOS STM32_VOS_RANGE1
|
||||
#define STM32_PWR_BOOST TRUE
|
||||
#define STM32_PWR_CR2 (PWR_CR2_PLS_LEV0)
|
||||
#define STM32_PWR_CR3 (PWR_CR3_EIWF)
|
||||
#define STM32_PWR_CR4 (0U)
|
||||
#define STM32_PWR_PUCRA (0U)
|
||||
#define STM32_PWR_PDCRA (0U)
|
||||
#define STM32_PWR_PUCRB (0U)
|
||||
#define STM32_PWR_PDCRB (0U)
|
||||
#define STM32_PWR_PUCRC (0U)
|
||||
#define STM32_PWR_PDCRC (0U)
|
||||
#define STM32_PWR_PUCRD (0U)
|
||||
#define STM32_PWR_PDCRD (0U)
|
||||
#define STM32_PWR_PUCRE (0U)
|
||||
#define STM32_PWR_PDCRE (0U)
|
||||
#define STM32_PWR_PUCRF (0U)
|
||||
#define STM32_PWR_PDCRF (0U)
|
||||
#define STM32_PWR_PUCRG (0U)
|
||||
#define STM32_PWR_PDCRG (0U)
|
||||
#define STM32_HSI16_ENABLED TRUE
|
||||
#define STM32_HSI48_ENABLED TRUE
|
||||
#define STM32_HSE_ENABLED FALSE
|
||||
|
|
|
@ -42,9 +42,24 @@
|
|||
*/
|
||||
#define STM32_NO_INIT FALSE
|
||||
#define STM32_VOS STM32_VOS_RANGE1
|
||||
#define STM32_PWR_BOOST TRUE
|
||||
#define STM32_PWR_CR2 (PWR_CR2_PLS_LEV0)
|
||||
#define STM32_PWR_CR3 (PWR_CR3_EIWF)
|
||||
#define STM32_PWR_CR4 (0U)
|
||||
#define STM32_PWR_PUCRA (0U)
|
||||
#define STM32_PWR_PDCRA (0U)
|
||||
#define STM32_PWR_PUCRB (0U)
|
||||
#define STM32_PWR_PDCRB (0U)
|
||||
#define STM32_PWR_PUCRC (0U)
|
||||
#define STM32_PWR_PDCRC (0U)
|
||||
#define STM32_PWR_PUCRD (0U)
|
||||
#define STM32_PWR_PDCRD (0U)
|
||||
#define STM32_PWR_PUCRE (0U)
|
||||
#define STM32_PWR_PDCRE (0U)
|
||||
#define STM32_PWR_PUCRF (0U)
|
||||
#define STM32_PWR_PDCRF (0U)
|
||||
#define STM32_PWR_PUCRG (0U)
|
||||
#define STM32_PWR_PDCRG (0U)
|
||||
#define STM32_HSI16_ENABLED TRUE
|
||||
#define STM32_HSI48_ENABLED TRUE
|
||||
#define STM32_HSE_ENABLED FALSE
|
||||
|
|
|
@ -40,7 +40,7 @@
|
|||
|
||||
/**
|
||||
* @brief System time counter resolution.
|
||||
* @note Allowed values are 16 or 32 bits.
|
||||
* @note Allowed values are 16, 32 or 64 bits.
|
||||
*/
|
||||
#if !defined(CH_CFG_ST_RESOLUTION)
|
||||
#define CH_CFG_ST_RESOLUTION 32
|
||||
|
|
|
@ -40,7 +40,7 @@
|
|||
|
||||
/**
|
||||
* @brief System time counter resolution.
|
||||
* @note Allowed values are 16 or 32 bits.
|
||||
* @note Allowed values are 16, 32 or 64 bits.
|
||||
*/
|
||||
#if !defined(CH_CFG_ST_RESOLUTION)
|
||||
#define CH_CFG_ST_RESOLUTION 32
|
||||
|
|
|
@ -42,6 +42,11 @@ ifeq ($(strip $(MCU)), risc-v)
|
|||
PLATFORM_MK = $(CHIBIOS_CONTRIB)/os/hal/ports/GD/GD32VF103/platform.mk
|
||||
else
|
||||
# ARM Support
|
||||
CHIBIOS_PORT ?=
|
||||
ifeq ("$(CHIBIOS_PORT)","")
|
||||
CHIBIOS_PORT = ARMv$(ARMV)-M
|
||||
endif
|
||||
|
||||
# Startup files. Try a few different locations, for compability with old versions and
|
||||
# for things hardware in the contrib repository
|
||||
STARTUP_MK = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/startup_$(MCU_STARTUP).mk
|
||||
|
@ -52,15 +57,24 @@ else
|
|||
endif
|
||||
endif
|
||||
|
||||
# Compability with old version
|
||||
PORT_V = $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/mk/port_v$(ARMV)m.mk
|
||||
# Port files. Try a few different locations, for compability with old versions and
|
||||
# for things hardware in the contrib repository
|
||||
PORT_V = $(CHIBIOS)/os/common/ports/$(CHIBIOS_PORT)/compilers/GCC/mk/port.mk
|
||||
ifeq ("$(wildcard $(PORT_V))","")
|
||||
PORT_V = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v$(ARMV)m.mk
|
||||
PORT_V = $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/mk/port_v$(ARMV)m.mk
|
||||
ifeq ("$(wildcard $(PORT_V))","")
|
||||
PORT_V = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v$(ARMV)m.mk
|
||||
endif
|
||||
endif
|
||||
|
||||
RULESPATH = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC
|
||||
# Rules location. Try a few different locations, for compability with old versions and
|
||||
# for things hardware in the contrib repository
|
||||
RULESPATH = $(CHIBIOS)/os/common/ports/$(CHIBIOS_PORT)/compilers/GCC
|
||||
ifeq ("$(wildcard $(RULESPATH)/rules.mk)","")
|
||||
RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC
|
||||
RULESPATH = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC
|
||||
ifeq ("$(wildcard $(RULESPATH)/rules.mk)","")
|
||||
RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC
|
||||
endif
|
||||
endif
|
||||
endif
|
||||
|
||||
|
|
|
@ -71,7 +71,12 @@ uint8_t keyboard_protocol __attribute__((aligned(2))) = 1;
|
|||
uint8_t keyboard_led_state = 0;
|
||||
volatile uint16_t keyboard_idle_count = 0;
|
||||
static virtual_timer_t keyboard_idle_timer;
|
||||
static void keyboard_idle_timer_cb(void *arg);
|
||||
|
||||
#if CH_KERNEL_MAJOR >= 7
|
||||
static void keyboard_idle_timer_cb(struct ch_virtual_timer *, void *arg);
|
||||
#elif CH_KERNEL_MAJOR <= 6
|
||||
static void keyboard_idle_timer_cb(void *arg);
|
||||
#endif
|
||||
|
||||
report_keyboard_t keyboard_report_sent = {{0}};
|
||||
#ifdef MOUSE_ENABLE
|
||||
|
@ -774,7 +779,12 @@ void kbd_sof_cb(USBDriver *usbp) { (void)usbp; }
|
|||
|
||||
/* Idle requests timer code
|
||||
* callback (called from ISR, unlocked state) */
|
||||
#if CH_KERNEL_MAJOR >= 7
|
||||
static void keyboard_idle_timer_cb(struct ch_virtual_timer *timer, void *arg) {
|
||||
(void)timer;
|
||||
#elif CH_KERNEL_MAJOR <= 6
|
||||
static void keyboard_idle_timer_cb(void *arg) {
|
||||
#endif
|
||||
USBDriver *usbp = (USBDriver *)arg;
|
||||
|
||||
osalSysLockFromISR();
|
||||
|
|
|
@ -3,6 +3,17 @@
|
|||
set -eEuo pipefail
|
||||
umask 022
|
||||
|
||||
#####################
|
||||
# You will need to get an older JDK -- JDK 8
|
||||
#
|
||||
# !!!!!!!! DO NOT INSTALL THIS IF YOU HAVE AN EXISTING JDK OR JRE INSTALLED !!!!!!!!
|
||||
#
|
||||
# For Debian 10-ish distro's:
|
||||
# wget -qO - https://adoptopenjdk.jfrog.io/adoptopenjdk/api/gpg/key/public | sudo apt-key add -
|
||||
# sudo add-apt-repository --yes https://adoptopenjdk.jfrog.io/adoptopenjdk/deb/
|
||||
# sudo apt-get update && sudo apt-get install adoptopenjdk-8-hotspot
|
||||
|
||||
|
||||
sinfo() { echo "$@" >&2 ; }
|
||||
shead() { sinfo "" ; sinfo "---------------------------------" ; sinfo "-- $@" ; sinfo "---------------------------------" ; }
|
||||
havecmd() { command command type "${1}" >/dev/null 2>&1 || return 1 ; }
|
||||
|
@ -11,8 +22,6 @@ this_script="$(realpath "${BASH_SOURCE[0]}")"
|
|||
script_dir="$(realpath "$(dirname "$this_script")")"
|
||||
qmk_firmware_dir="$(realpath "$script_dir/../")"
|
||||
|
||||
declare -A file_hashes
|
||||
|
||||
export PATH="$PATH:$script_dir/fmpp/bin"
|
||||
|
||||
build_fmpp() {
|
||||
|
@ -45,67 +54,6 @@ find_chibi_files() {
|
|||
done
|
||||
}
|
||||
|
||||
revert_chibi_files() {
|
||||
local search_path="$1"
|
||||
shead "Reverting ChibiOS config/board files..."
|
||||
for file in $(find_chibi_files "$search_path" -name chconf.h -or -name halconf.h -or -name mcuconf.h -or -name board.c -or -name board.h -or -name board.mk -or -name board.chcfg) ; do
|
||||
pushd "$search_path" >/dev/null 2>&1
|
||||
local relpath=$(realpath --relative-to="$search_path" "$file")
|
||||
git checkout upstream/develop -- "$relpath" || git checkout origin/develop -- "$relpath" || true
|
||||
popd >/dev/null 2>&1
|
||||
done
|
||||
}
|
||||
|
||||
populate_file_hashes() {
|
||||
local search_path="$1"
|
||||
shead "Determining duplicate config/board files..."
|
||||
for file in $(find_chibi_files "$search_path" -name chconf.h -or -name halconf.h -or -name mcuconf.h -or -name board.c -or -name board.h) ; do
|
||||
local key="file_$(clang-format "$file" | sha1sum | cut -d' ' -f1)"
|
||||
local relpath=$(realpath --relative-to="$search_path" "$file")
|
||||
file_hashes[$key]="${file_hashes[$key]:-} $relpath"
|
||||
done
|
||||
for file in $(find_chibi_files "$search_path" -name board.mk -or -name board.chcfg) ; do
|
||||
local key="file_$(cat "$file" | sha1sum | cut -d' ' -f1)"
|
||||
local relpath=$(realpath --relative-to="$search_path" "$file")
|
||||
file_hashes[$key]="${file_hashes[$key]:-} $relpath"
|
||||
done
|
||||
}
|
||||
|
||||
determine_equivalent_files() {
|
||||
local search_file="$1"
|
||||
for K in "${!file_hashes[@]}"; do
|
||||
for V in ${file_hashes[$K]}; do
|
||||
if [[ "$V" == "$search_file" ]] ; then
|
||||
for V in ${file_hashes[$K]}; do
|
||||
echo "$V"
|
||||
done
|
||||
return 0
|
||||
fi
|
||||
done
|
||||
done
|
||||
return 1
|
||||
}
|
||||
|
||||
deploy_staged_files() {
|
||||
shead "Deploying staged files..."
|
||||
for file in $(find "$qmk_firmware_dir/util/chibios-upgrade-staging" -type f) ; do
|
||||
local relpath=$(realpath --relative-to="$qmk_firmware_dir/util/chibios-upgrade-staging" "$file")
|
||||
sinfo "Deploying staged file: $relpath"
|
||||
for other in $(determine_equivalent_files "$relpath") ; do
|
||||
sinfo " => $other"
|
||||
cp "$qmk_firmware_dir/util/chibios-upgrade-staging/$relpath" "$qmk_firmware_dir/$other"
|
||||
done
|
||||
done
|
||||
}
|
||||
|
||||
swap_mcuconf_f3xx_f303() {
|
||||
shead "Swapping STM32F3xx_MCUCONF -> STM32F303_MCUCONF..."
|
||||
for file in $(find_chibi_files "$qmk_firmware_dir" -name mcuconf.h) ; do
|
||||
sed -i 's#STM32F3xx_MCUCONF#STM32F303_MCUCONF#g' "$file"
|
||||
dos2unix "$file" >/dev/null 2>&1
|
||||
done
|
||||
}
|
||||
|
||||
upgrade_conf_files_generic() {
|
||||
local search_filename="$1"
|
||||
local update_script="$2"
|
||||
|
@ -150,35 +98,8 @@ upgrade_mcuconf_files() {
|
|||
popd >/dev/null 2>&1
|
||||
}
|
||||
|
||||
update_staged_files() {
|
||||
shead "Updating staged files with ChibiOS upgraded versions..."
|
||||
for file in $(find "$qmk_firmware_dir/util/chibios-upgrade-staging" -type f) ; do
|
||||
local relpath=$(realpath --relative-to="$qmk_firmware_dir/util/chibios-upgrade-staging" "$file")
|
||||
sinfo "Updating staged file: $relpath"
|
||||
cp "$qmk_firmware_dir/$relpath" "$qmk_firmware_dir/util/chibios-upgrade-staging/$relpath"
|
||||
done
|
||||
}
|
||||
|
||||
havecmd fmpp || build_fmpp
|
||||
revert_chibi_files "$qmk_firmware_dir"
|
||||
populate_file_hashes "$qmk_firmware_dir"
|
||||
|
||||
shead "Showing duplicate ChibiOS files..."
|
||||
for K in "${!file_hashes[@]}"; do
|
||||
sinfo ${K#file_}:
|
||||
for V in ${file_hashes[$K]}; do
|
||||
sinfo " $V"
|
||||
done
|
||||
done
|
||||
|
||||
if [ "${1:-}" == "-r" ] ; then
|
||||
exit 0
|
||||
fi
|
||||
|
||||
swap_mcuconf_f3xx_f303
|
||||
|
||||
deploy_staged_files
|
||||
upgrade_mcuconf_files
|
||||
upgrade_chconf_files
|
||||
upgrade_halconf_files
|
||||
update_staged_files
|
||||
|
|
|
@ -7,10 +7,10 @@
|
|||
chibios_branches="trunk stable_20.3.x stable_21.6.x"
|
||||
|
||||
# The ChibiOS tags to mirror
|
||||
chibios_tags="ver20.3.1 ver20.3.2 ver20.3.3 ver21.6.0"
|
||||
chibios_tags="ver20.3.1 ver20.3.2 ver20.3.3 ver20.3.4 ver21.6.0"
|
||||
|
||||
# The ChibiOS-Contrib branches to mirror
|
||||
contrib_branches="chibios-20.3.x"
|
||||
contrib_branches="chibios-20.3.x chibios-21.6.x"
|
||||
|
||||
################################
|
||||
# Actions
|
||||
|
|
Loading…
Reference in a new issue